1. Field of the Invention
The present invention relates to a resistance change memory, such as a resistance change memory comprising a variable resistive element which changes its resistance in accordance with stored data.
2. Description of the Related Art
A magnetic random access memory (MRAM) is known as one kind of a resistance change memory. The MRAM is a device which performs memory operation by using a magnetoresistive effect to store “1” or “0” information in a memory cell. The MRAM is ranked as one of candidate universal memory devices achieving nonvolatility, high integration properties, high reliability, lower power consumption properties and high-speed operation.
There have been reported a great number of MRAMs using elements that show the tunneling magnetoresistive (TMR) effect among the magnetoresistive effects. As a TMR effect element, a magnetic tunnel junction (MTJ) element is generally used. This MTJ element has a stacked structure including two ferromagnetic layers and an insulating layer interposed between the ferromagnetic layers, and utilizes the change of magnetic resistance caused by a spin-polarized tunnelling effect.
Data can be read from the MRAM using the MTJ element as follows: A predetermined voltage is applied across two ferromagnetic layers of an MTJ element corresponding to a selected bit, and a resistance is read from a current running through this MTJ element. Alternatively, a predetermined current is applied to a selected MTJ element, and a voltage thus generated across two ferromagnetic layers is read.
Therefore, as a reading scheme, a current/voltage detection sensing scheme is used wherein the current or voltage of the selected MTJ element is amplified and detected by a sense amplifier. That is to say, the resistance of the MTJ element is detected in reading, so that a variation in resistance of the MTJ element is the primary cause that determines a read margin in a high-capacity memory.
Furthermore, as a related art of this kind, there has been disclosed a technique for reducing the area occupied on a chip by a reference cell used for data reading (Jpn. Pat. Appln. KOKAI Publication No. 2004-103060).